; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc < %s -mtriple=powerpc64le-unknown-linux-gnu -mcpu=pwr9 -verify-machineinstrs | FileCheck %s --check-prefixes=CHECK,V01,CHECK-V0
; RUN: llc < %s -mtriple=powerpc64-unknown-linux-gnu -mcpu=pwr9 -verify-machineinstrs | FileCheck %s --check-prefixes=CHECK,V01,CHECK-V1
; RUN: llc < %s -mtriple=powerpc64le-unknown-linux-gnu -mcpu=pwr8 -verify-machineinstrs | FileCheck %s --check-prefixes=CHECK,V23,CHECK-V2
; RUN: llc < %s -mtriple=powerpc64-unknown-linux-gnu -mcpu=pwr8 -verify-machineinstrs | FileCheck %s --check-prefixes=CHECK,V23,CHECK-V3

; Function Attrs: norecurse nounwind readonly
define signext i32 @limit_loop(i32 signext %iters, ptr nocapture readonly %vec, i32 signext %limit) local_unnamed_addr {
; V01-LABEL: limit_loop:
; V01:       # %bb.0: # %entry
; V01-NEXT:    mr 6, 3
; V01-NEXT:    li 3, 0
; V01-NEXT:    cmpwi 6, 0
; V01-NEXT:    blelr 0
; V01-NEXT:  # %bb.1: # %for.body.preheader
; V01-NEXT:    mtctr 6
; V01-NEXT:    addi 4, 4, -4
; V01-NEXT:    b .LBB0_3
; V01-NEXT:    .p2align 4
; V01-NEXT:  .LBB0_2: # %for.cond
; V01-NEXT:    #
; V01-NEXT:    bdzlr
; V01-NEXT:  .LBB0_3: # %for.body
; V01-NEXT:    #
; V01-NEXT:    lwzu 6, 4(4)
; V01-NEXT:    cmpw 6, 5
; V01-NEXT:    blt 0, .LBB0_2
; V01-NEXT:  # %bb.4:
; V01-NEXT:    li 3, 1
; V01-NEXT:    blr
;
; V23-LABEL: limit_loop:
; V23:       # %bb.0: # %entry
; V23-NEXT:    mr 6, 3
; V23-NEXT:    li 3, 0
; V23-NEXT:    cmpwi 6, 0
; V23-NEXT:    blelr 0
; V23-NEXT:  # %bb.1: # %for.body.preheader
; V23-NEXT:    addi 4, 4, -4
; V23-NEXT:    mtctr 6
; V23-NEXT:    b .LBB0_3
; V23-NEXT:    .p2align 4
; V23-NEXT:  .LBB0_2: # %for.cond
; V23-NEXT:    #
; V23-NEXT:    bdzlr
; V23-NEXT:  .LBB0_3: # %for.body
; V23-NEXT:    #
; V23-NEXT:    lwzu 6, 4(4)
; V23-NEXT:    cmpw 6, 5
; V23-NEXT:    blt 0, .LBB0_2
; V23-NEXT:  # %bb.4:
; V23-NEXT:    li 3, 1
; V23-NEXT:    blr
entry:
  %cmp5 = icmp sgt i32 %iters, 0
  br i1 %cmp5, label %for.body.preheader, label %cleanup

for.body.preheader:                               ; preds = %entry
  %0 = sext i32 %iters to i64
  br label %for.body

for.cond:                                         ; preds = %for.body
  %cmp = icmp slt i64 %indvars.iv.next, %0
  br i1 %cmp, label %for.body, label %cleanup

for.body:                                         ; preds = %for.body.preheader, %for.cond
  %indvars.iv = phi i64 [ 0, %for.body.preheader ], [ %indvars.iv.next, %for.cond ]
  %arrayidx = getelementptr inbounds i32, ptr %vec, i64 %indvars.iv
  %1 = load i32, ptr %arrayidx, align 4
  %cmp1 = icmp slt i32 %1, %limit
  %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
  br i1 %cmp1, label %for.cond, label %cleanup

cleanup:                                          ; preds = %for.body, %for.cond, %entry
  %2 = phi i32 [ 0, %entry ], [ 0, %for.cond ], [ 1, %for.body ]
  ret i32 %2
}


;; NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line:
; CHECK: {{.*}}
; CHECK-V0: {{.*}}
; CHECK-V1: {{.*}}
; CHECK-V2: {{.*}}
; CHECK-V3: {{.*}}
